
213
8008H–AVR–04/11
ATtiny48/88
22.9
SPI Characteristics
Note:
1. In SPI Programming mode the minimum SCK high/low period is:
- 2 tCLCL for fCK < 12 MHz
- 3 t
CLCL for fCK > 12 MHz
2. All DC Characteristics contained in this datasheet are based on simulation and characteriza-
tion of other AVR microcontrollers manufactured in the same process technology.
Table 22-8.
SPI Timing Parameters
Description
Mode
Min
Typ
Max
1
SCK period
Master
ns
2
SCK high/low
Master
50% duty cycle
3
Rise/Fall time
Master
3.6
4
Setup
Master
10
5Hold
Master
10
6
Out to SCK
Master
0.5 tsck
7
SCK to out
Master
10
8
SCK to out high
Master
10
9SS low to out
Slave
15
10
SCK period
Slave
4 tck
11
Slave
2 tck
12
Rise/Fall time
Slave
1600
13
Setup
Slave
10
14
Hold
Slave
tck
15
SCK to out
Slave
15
16
SCK to SS high
Slave
20
17
SS high to tri-state
Slave
10
18
SS low to SCK
Slave
20